DS80C390-QNR中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書

DESCRIPTION

The DS80C390 is a fast 8051-compatible microprocessor. The redesigned processor core executes 8051 instructions up to 3 times faster than the original for the same crystal speed. The DS80C390 supports a maximum crystal speed of 40 MHz, resulting in apparent execution speeds of 100 MHz (approximately 2.5X). An optional internal frequency multiplier allows the microprocessor to operate at full speed with a reduced crystal frequency, reducing EMI. A hardware math accelerator further increases the speed of 32 and 16 bit multiply and divide operations, as well as high-speed shift, normalization and accumulate functions.

FEATURES

■ 80C52 compatible

- 8051 instruction-set compatible

- Four 8-bit I/O ports

- Three 16-bit timer/counters

- 256 bytes scratchpad RAM

■ High-Speed Architecture

- 4 clocks/machine cycle (8051=12)

- Runs DC to 40 MHz clock rates

- Frequency multiplier reduces EMI

- Single-cycle instruction in 100 ns

- 16/32-bit math coprocessor

■ 4 kB internal SRAM usable as program/data/stack memory

■ Enhanced memory architecture

- Addresses up to 4 MB external

- Defaults to true 8051 memory compatibility

- User-enabled 22-bit program/data counter

- 16-Bit/22-bit paged/22-bit contiguous modes

- User-selectable multiplexed / nonmultiplexed memory interface

- Optional 10 bit stack pointer

■ Two full-function CAN 2.0B controllers

- 15 message centers per controller

- Standard 11-bit or extended 29-bit identification modes

- Supports DeviceNet, SDS, and higher layer CAN protocols

- Disables transmitter during autobaud

- SIESTA low power mode

■ Two full-duplex hardware serial ports

■ Programmable IrDA clock

■ High integration controller includes

- Power-fail reset

- Early-warning power-fail interrupt

- Programmable watchdog timer

- Oscillator-fail detection

■ 16 total interrupt sources with 6 external

■ Available in 64-pin QFP, 68-pin PLCC

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