DSM2150F5V-12T6集成電路（IC）的存儲器規(guī)格書PDF中文資料

DSM2150F5V-12T6屬于集成電路（IC）的存儲器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的DSM2150F5V-12T6存儲器存儲器是集成電路上用作數(shù)據(jù)存儲設(shè)備的半導(dǎo)體器件。這些器件分為非易失性或易失性兩種，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線、SPI、UFS、Xccela 總線和 1-線。

The DSM2150F5V is an 8 or 16-bit system memory device for use with the Analog Devices DSPs. DSM means Digital signal processor System Memory. A DSM device brings In-System Programmable (ISP) Flash memory, parameter storage, programmable logic, and additional I/O to DSP systems. The result is a flexible two-chip solution for DSP designs. On-chip integrated memory decode logic makes it easy to map dual banks of Flash memory to the DSPs in a variety of ways for bootloading or bypassing DSP boot ROM, code execution, data recording, code swapping, and parameter storage.

FEATURES SUMMARY

■ Glueless Connection to DSP

– Easily add memory, logic, and I/O to the External Port of ADSP-218x, 219x, 2106x, 2116x, 2153x, and TS101 families of

DSPs from Analog Devices, Inc.

■ Dual Flash Memories

– Two independent Flash memory arrays for storing DSP code and data

– Capable of read-while-write concurrent Flash memory operation

– Device can be configured as 8-bit or 16-bit

– Built-in programmable address decoding logic allows mapping individual sectors of each Flash array to any address boundary

– Each Flash sector can be write protected

■ 512 KByte Main Flash memory

– Ample storage for boot loading DSP code/data upon reset and subsequent code swaps

– Large capacity for storing tables and constants or for data recording

■ 32 KByte Secondary Flash memory

– Smaller sector size ideal for storing calibration and configuration constants. Eliminate external serial EEPROM.

– Optionally bypass internal DSP boot ROM during start-up and execute code directly from Secondary Flash. Use for custom

start-up code and In-Application Programming (IAP).

■ Up to 40 Multifunction I/O Pins

– Increase total DSP system I/O capability

– I/O controlled by DSP software or PLD logic

■ General purpose PLD

– Use for peripheral glue logic to keypads, control panel, displays, LCDs, and other devices

– Over 3,000 gates of PLD with 16 macro cells

– Eliminate PLDs and external logic devices

– Create state machines, chip selects, simple shifters and counters, clock dividers, delays