DSP56366UM中文資料飛思卡爾數(shù)據(jù)手冊PDF規(guī)格書

Overview

The DSP56366 supports digital audio applications requiring sound field processing, acoustic equalization, and other digital audio algorithms. The DSP56366 uses the high performance, single-clock-per-cycle DSP56300 core family of programmable CMOS digital signal processors (DSPs) combined with the audio signal processing capability of the Freescale Symphony? DSP family, as shown in Figure 1-1. This design provides a two-fold performance increase over Freescale’s popular 56000 Symphony family of DSPs while retaining code compatibility. Significant architectural enhancements include a barrel shifter, 24-bit addressing, instruction cache, and direct memory access (DMA). The DSP56366 offers 120 million instructions per second (MIPS) using an internal 120 MHz clock at 3.3 V.