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DSPIC33FJ06GS101TI/PT中文資料微芯科技數(shù)據(jù)手冊(cè)PDF規(guī)格書
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DSPIC33FJ06GS101TI/PT規(guī)格書詳情
Peripheral Features:
? Timer/Counters, up to Three 16-Bit Timers:
- Can pair up to make one 32-bit timer
? Input Capture (up to two channels):
- Capture on up, down or both edges
- 16-bit capture input functions
- 4-deep FIFO on each capture
? Output Compare (up to two channels):
- Single or Dual 16-Bit Compare mode
- 16-Bit Glitchless PWM mode
? 4-Wire SPI:
- Framing supports I/O interface to simple codecs
- 1-deep FIFO Buffer.
- Supports 8-bit and 16-bit data
- Supports all serial clock formats and sampling modes
?I2C?:
- Supports Full Multi-Master Slave mode
- 7-bit and 10-bit addressing
- Bus collision detection and arbitration
- Integrated signal conditioning
- Slave address masking
?UART:
- Interrupt on address bit detect
- Interrupt on UART error
- Wake-up on Start bit from Sleep mode
- 4-character TX and RX FIFO buffers
- LIN bus support
-IrDA? encoding and decoding in hardware
- High-Speed Baud mode
- Hardware Flow Control with CTS and RTS
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---|---|---|---|---|---|---|---|
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20+ |
SOIC-18-300mil |
5 |
詢價(jià) | |||
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23+ |
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7350 |
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23+ |
NA/ |
8735 |
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20+ |
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15988 |
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20094 |
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17+ |
6200 |
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詢價(jià) | |||
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23+ |
SOIC |
6598 |
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詢價(jià) |