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DV74ACT109

Dual JK Positive Edge-triggered Flip-Flop

DualJKPositiveEdge-TriggeredFlip-Flop

AVG

AVG Semiconductors(HITEK)

IN74ACT109

DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS

DualJ-KFlip-FlopwithSetandReset High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

IKSEMICON

IK Semicon Co., Ltd

IN74ACT109

DUALJ-KFLIP-FLOPWITHSETANDRESET

DUALJ-KFLIP-FLOPWITHSETANDRESET High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

INTEGRAL

Integral Corp.

IN74ACT109D

DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS

DualJ-KFlip-FlopwithSetandReset High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

IKSEMICON

IK Semicon Co., Ltd

IN74ACT109D

DUALJ-KFLIP-FLOPWITHSETANDRESET

DUALJ-KFLIP-FLOPWITHSETANDRESET High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

INTEGRAL

Integral Corp.

IN74ACT109N

DUALJ-KFLIP-FLOPWITHSETANDRESET

DUALJ-KFLIP-FLOPWITHSETANDRESET High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

INTEGRAL

Integral Corp.

IN74ACT109N

DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS

DualJ-KFlip-FlopwithSetandReset High-SpeedSilicon-GateCMOS TheIN74ACT109isidenticalinpinouttotheLS/ALS109,HC/HCT109.TheIN74ACT109maybeusedasalevelconverterforinterfacingTTLorNMOSoutputstoHighSpeedCMOSinputs. ThisdeviceconsistsoftwoJ-Kflip-flopswithin

IKSEMICON

IK Semicon Co., Ltd

KK74ACT109

DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS

KODENSHIKODENSHI_AUK CORP.

可天士可天士光電子集團

KK74ACT109D

DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS

KODENSHIKODENSHI_AUK CORP.

可天士可天士光電子集團

KK74ACT109N

DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS

KODENSHIKODENSHI_AUK CORP.

可天士可天士光電子集團

MC74ACT109

DualJKPositiveEdge??riggeredFlip??lop

TheMC74AC109/74ACT109consistsoftwohigh?speedcompletelyindependenttransitionclockedJKflip?flops.Theclockingoperationisindependentofriseandfalltimesoftheclockwaveform. TheJKdesignallowsoperationasaDflip?flop(refertoMC74AC74/74ACT74datasheet)byconnectingtheJ

ONSEMION Semiconductor

安森美半導體安森美半導體公司

MC74ACT109D

DualJKPositiveEdge??riggeredFlip??lop

TheMC74AC109/74ACT109consistsoftwohigh?speedcompletelyindependenttransitionclockedJKflip?flops.Theclockingoperationisindependentofriseandfalltimesoftheclockwaveform. TheJKdesignallowsoperationasaDflip?flop(refertoMC74AC74/74ACT74datasheet)byconnectingtheJ

ONSEMION Semiconductor

安森美半導體安森美半導體公司

MC74ACT109DT

DualJKPositiveEdge??riggeredFlip??lop

TheMC74AC109/74ACT109consistsoftwohigh?speedcompletelyindependenttransitionclockedJKflip?flops.Theclockingoperationisindependentofriseandfalltimesoftheclockwaveform. TheJKdesignallowsoperationasaDflip?flop(refertoMC74AC74/74ACT74datasheet)byconnectingtheJ

ONSEMION Semiconductor

安森美半導體安森美半導體公司

MC74ACT109M

DualJKPositiveEdge??riggeredFlip??lop

TheMC74AC109/74ACT109consistsoftwohigh?speedcompletelyindependenttransitionclockedJKflip?flops.Theclockingoperationisindependentofriseandfalltimesoftheclockwaveform. TheJKdesignallowsoperationasaDflip?flop(refertoMC74AC74/74ACT74datasheet)byconnectingtheJ

ONSEMION Semiconductor

安森美半導體安森美半導體公司

MC74ACT109MEL

DualJKPositiveEdge??riggeredFlip??lop

TheMC74AC109/74ACT109consistsoftwohigh?speedcompletelyindependenttransitionclockedJKflip?flops.Theclockingoperationisindependentofriseandfalltimesoftheclockwaveform. TheJKdesignallowsoperationasaDflip?flop(refertoMC74AC74/74ACT74datasheet)byconnectingtheJ

ONSEMION Semiconductor

安森美半導體安森美半導體公司

MC74ACT109N

DualJKPositiveEdge??riggeredFlip??lop

TheMC74AC109/74ACT109consistsoftwohigh?speedcompletelyindependenttransitionclockedJKflip?flops.Theclockingoperationisindependentofriseandfalltimesoftheclockwaveform. TheJKdesignallowsoperationasaDflip?flop(refertoMC74AC74/74ACT74datasheet)byconnectingtheJ

ONSEMION Semiconductor

安森美半導體安森美半導體公司

詳細參數(shù)

  • 型號:

    DV74ACT109

  • 制造商:

    AVG

  • 制造商全稱:

    AVG

  • 功能描述:

    Dual JK Positive Edge-triggered Flip-Flop

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更多DV74ACT109供應商 更新時間2025-1-11 17:02:00