EBS11RC4ACNA-75中文資料美光科技數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Description

The EBS11RC4ACNA is 128M words × 72 bits, 2 banks Synchronous Dynamic RAM Registered Module, mounted 36 pieces of 256M bits SDRAM sealed in TCP package. This module provides high density and large quantities of memory in a small space without utilizing the surface mounting technology. Decoupling capacitors are mounted on power supply line for noise reduction.

Features

? Fully compatible with 8 bytes DIMM: JEDEC standard outline

? 168-pin socket type dual in line memory module (DIMM)

- PCB height: 30.48mm (1.20inch)

- Lead pitch: 1.27mm

? 3.3V power supply

? Clock frequency: 133MHz (max.)

? LVTTL interface

? Data bus width: × 72 ECC

? Single pulsed /RAS

? 4 Banks can operates simultaneously and independently

? Burst read/write operation and burst read/single write operation capability

? Programmable burst length (BL): 1, 2, 4, 8

? 2 variations of burst sequence

- Sequential

- Interleave

? Programmable /CAS latency (CL): 2, 3

? Registered inputs with one clock delay

? Byte control by DQMB

? Refresh cycles: 8192 refresh cycles/64ms

? 2 variations of refresh

- Auto refresh

- Self refresh

? 1 piece of PLL clock driver, 3 pieces of register driver and 1 piece of serial EEPROM (2k bits) for Presence Detect (SPD) on PCB.