EDI8L3265C中文資料WEDC數據手冊PDF規(guī)格書

The EDI8L3265C is a high speed, high performance, four megabit density Static RAM organized as a 64Kx32 bit array.

Four Byte Selects, two Chip Enables, Write Control, and Output Enable provide the user with a flexible memory solution. The user may independently enable each of the four bytes, and, with minimal additional peripheral logic, the unit may be configured as a 128Kx16 array.

Fully asynchronous circuitry is used, requiring no clocks or refreshing for operation and providing equal access and cycle times for ease of use.

Features

64Kx32 bit CMOS Static

Random Access Memory Array

? Fast Access Times: 12*, 15, 20, and 25ns

? Individual Byte Selects

? User Configurable Organization with Minimal Additional Logic

? Master Output Enable and Write Control

? TTL Compatible Inputs and Outputs

? Fully Static, No Clocks

Surface Mount Package

? 68 Lead PLCC, No. 99 (JEDEC-M0-47AE)

? Small Footprint, 0.990 Sq. In.

? Multiple Ground Pins for Maximum Noise Immunity

Single +5V (±5) Supply Operation