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EF6805R3中文資料意法半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

EF6805R3
廠商型號

EF6805R3

功能描述

8-BIT MICROCOMPUTER UNIT

文件大小

375.8 Kbytes

頁面數(shù)量

31

生產(chǎn)廠商 STMicroelectronics
企業(yè)簡稱

STMICROELECTRONICS意法半導(dǎo)體

中文名稱

意法半導(dǎo)體集團(tuán)官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-31 14:30:00

EF6805R3規(guī)格書詳情

DESCRIPTION

The EF6805U3 Microcomputer Unit (MCU) is a member of the 6805 Family of low-cost single-chip Microcomputers. The 8-bit microcomputer contains a CPU, on-chip CLOCK, ROM, RAM, I/O, and TIMER. It is designed for the user who needs an economical microcomputer with the proven capabilities of the 6800-based instruction set. A comparison of the key features of several members of the 6805 Family of Microcomputers is shown at the end of this data sheet. The following are some of the hardware and software highlights of the EF6805U3 MCU.

HARDWARE FEATURES

. 32 TTL/CMOS COMPATIBLE I/O LINES

. 24 BIDIRECTIONAL (8 lines are LED compatible)

. 8 INPUT-ONLY

. 3776 BYTES OF USER ROM

. 112 BYTES OF RAM

. SELF-CHECK MODE

. ZERO-CROSSING DETECT/INTERRUPT

. INTERNAL 8-BIT TIMER WITH 7-BIT SOFTWARE PROGRAMMABLE PRESCALER AND CLOCK SOURCE

. 5V SINGLE SUPPLY

SOFTWARE FEATURES

. 10 POWERFUL ADDRESSING MODES

. BYTE EFFICIENT INSTRUCTION SET WITH TRUE BIT MANIPULATION, BIT TEST, AND BRANCH INSTRUCTIONS

. SINGLE INSTRUCTION MEMORY EXAMINE/CHANGE

. POWERFUL INDEXED ADDRESSING FOR TABLES

. FULL SET OF CONDITIONAL BRANCHES

. MEMORY USABLE AS REGISTER/FLAGS

. COMPLETE DEVELOPMENT SYSTEM SUPPORT ON INICE

USER SELECTABLE OPTIONS

. 8 BIDIRECTIONAL I/O LINES WITH TTL OR TTL/CMOS INTERFACE OPTION

. 8 BIDIRECTIONAL I/O LINES WITH TTL OR OPEN-DRAIN INTERFACE OPTION

. CRYSTAL OR LOW-COST RESISTOR OSCIL LATOR OPTION

. LOW VOLTAGE INHIBIT OPTION

. VECTORED INTERRUPTS : TIMER, SOFTWARE, AND EXTERNAL

. USER CALLABLE SELF-CHECK SUBROUTINES

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