EM636327JT-10中文資料鈺創(chuàng)科技數(shù)據(jù)手冊PDF規(guī)格書

Overview

The EM636327 SGRAM is a high-speed CMOS synchronous graphics DRAM containing 16 Mbits. It is internally configured as a dual 256K x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 256K x 32 bit banks is organized as 1024 rows by 256 columns by 32 bits. Read and write accesses to the SGRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command.

Features

· Fast access time from clock: 5/5/5.5/6.5/7.5 ns

· Fast clock rate: 183/166/143/125/100 MHz

· Fully synchronous operation

· Internal pipelined architecture

· Dual internal banks(256K x 32-bit x 2-bank)

· Programmable Mode and Special Mode registers

- CAS# Latency: 1, 2, or 3

- Burst Length: 1, 2, 4, 8, or full page

- Burst Type: interleaved or linear burst

- Burst-Read-Single-Write

- Load Color or Mask register

· Burst stop function

· Individual byte controlled by DQM0-3

· Block write and write-per-bit capability

· Auto Refresh and Self Refresh

· 2048 refresh cycles/32ms

· Single +3.3V±0.3V power supply

· Interface: LVTTL

· JEDEC 100-pin Plastic package

-QFP (body thickness=2.8mm)

-TQFP1.4 (body thickness=1.4mm)

-TQFP1.0 (body thickness=1.0mm)