| 零件編號 | 下載&訂購 | 功能描述 | 制造商&上傳企業(yè) | LOGO |
|---|---|---|---|---|
EP1C3F400 | Cyclone FPGA Family | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | |
Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Section I. Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Section I. Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Section I. Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Section I. Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Section I. Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Section I. Cyclone FPGA Family Data Sheet Introduction TheCyclone?fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR) | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera | ||
Cyclone FPGA Family | AlteraAltera Corporation 阿爾特阿爾特拉公司 | Altera |
詳細參數(shù)
- 型號：
EP1C3F400
- 制造商：
ALTERA
- 制造商全稱：
Altera Corporation
- 功能描述：
Cyclone FPGA Family
相關規(guī)格書
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