FEDS82V48540-01中文資料沖電線數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

GENERAL DESCRIPTION

The MS82V48540 is a 48-Mbit system clock synchronous dynamic random access memory. In addition to the conventional random read/write access function, the MS82V48540 provides the automatic row address increment function and automatic bank switching function. Therefore, if once the row and column addresses are set, continuous serial accesses are possible while banks are automatically switched till input of the Precharge command. The MS82V48540 is ideal for digital camera and TV buffer memory applications.

FEATURES

? 393,216 words × 32 bits × 4 banks memory (1,536 rows × 256 columns × 32 bits × 4 banks)

? Single 3.3 V ±0.3 V power supply

? LVTTL compatible inputs and outputs

? Programmable burst length (1, 2, 4, 8 and full page)

? Programmable CAS latency (2, 3)

? Automatic row address increment function and automatic bank switching function

? Power Down operation and Clock Suspend operation

? 3,072 refresh cycles/64 ms

? Auto refresh and self refresh capability

? Package:

86-pin 400 mil plastic TSOP (II) (TSOPII86-P-400-0.50-K) (Product : MS82V48540-xTA)

x indicates speed rank.