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GAL22V10B-7LPI中文資料萊迪思數(shù)據(jù)手冊(cè)PDF規(guī)格書

GAL22V10B-7LPI
廠商型號(hào)

GAL22V10B-7LPI

功能描述

High Performance E2CMOS PLD Generic Array Logic

文件大小

386.45 Kbytes

頁(yè)面數(shù)量

29 頁(yè)

生產(chǎn)廠商 Lattice Semiconductor
企業(yè)簡(jiǎn)稱

Lattice萊迪思

中文名稱

萊迪思半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2024-12-26 23:00:00

GAL22V10B-7LPI規(guī)格書詳情

Description

The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much less power when compared to bipolar 22V10 devices. E2 technology offers high speed (

Features

? HIGH PERFORMANCE E2CMOS? TECHNOLOGY

— 4 ns Maximum Propagation Delay

— Fmax = 250 MHz

— 3.5 ns Maximum from Clock Input to Data Output

— UltraMOS? Advanced CMOS Technology

? ACTIVE PULL-UPS ON ALL PINS

? COMPATIBLE WITH STANDARD 22V10 DEVICES

— Fully Function/Fuse-Map/Parametric Compatible with Bipolar and UVCMOS 22V10 Devices

? 50 to 75 REDUCTION IN POWER VERSUS BIPOLAR

— 90mA Typical Icc on Low Power Device

— 45mA Typical Icc on Quarter Power Device

? E2 CELL TECHNOLOGY

— Reconfigurable Logic

— Reprogrammable Cells

— 100 Tested/100 Yields

— High Speed Electrical Erasure (<100ms)

— 20 Year Data Retention

? TEN OUTPUT LOGIC MACROCELLS

— Maximum Flexibility for Complex Logic Designs

? PRELOAD AND POWER-ON RESET OF REGISTERS

— 100 Functional Testability

? APPLICATIONS INCLUDE:

— DMA Control

— State Machine Control

— High Speed Graphics Processing

— Standard Logic Speed Upgrade

? ELECTRONIC SIGNATURE FOR IDENTIFICATION

產(chǎn)品屬性

  • 型號(hào):

    GAL22V10B-7LPI

  • 制造商:

    LATTICE

  • 制造商全稱:

    Lattice Semiconductor

  • 功能描述:

    High Performance E2CMOS PLD Generic Array Logic

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