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GS84018T-150中文資料GSI數(shù)據(jù)手冊(cè)PDF規(guī)格書

GS84018T-150
廠商型號(hào)

GS84018T-150

功能描述

256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs

文件大小

629.59 Kbytes

頁面數(shù)量

31

生產(chǎn)廠商 GSI Technology
企業(yè)簡(jiǎn)稱

GSI

中文名稱

GSI Technology官網(wǎng)

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更新時(shí)間

2025-1-24 19:26:00

GS84018T-150規(guī)格書詳情

Features

? FT pin for user configurable flow through or pipelined operation.

? Single Cycle Deselect (SCD) Operation.

? 3.3V +10/-5 Core power supply

? 2.5V or 3.3V I/O supply.

? LBO pin for linear or interleaved burst mode.

? Internal input resistors on mode pins allow floating mode pins.

? Default to Interleaved Pipelined Mode.

? Byte write (BW) and/or global write (GW) operation.

? Common data inputs and data outputs.

? Clock Control, registered, address, data, and control.

? Internal Self-Timed Write cycle.

? Automatic power-down for portable applications.

? JEDEC standard 100-lead TQFP or 119 Bump BGA package.

Applications

The GS84018/32/36 is a 4,718,592 bit (4,194,304 bit for x32 version) high performance synchronous SRAM with a 2 bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPU’s, the device now finds application in synchronous SRAM applications ranging from DSP main store to networking chip set support. The GS84018/32/36 is available in a JEDEC standard 100-lead TQFP or 119 Bump BGA package.

產(chǎn)品屬性

  • 型號(hào):

    GS84018T-150

  • 功能描述:

    x18 Fast Synchronous SRAM

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
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