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GS84036T-100中文資料GSI數(shù)據(jù)手冊(cè)PDF規(guī)格書
GS84036T-100規(guī)格書詳情
Features
? FT pin for user configurable flow through or pipelined operation.
? Single Cycle Deselect (SCD) Operation.
? 3.3V +10/-5 Core power supply
? 2.5V or 3.3V I/O supply.
? LBO pin for linear or interleaved burst mode.
? Internal input resistors on mode pins allow floating mode pins.
? Default to Interleaved Pipelined Mode.
? Byte write (BW) and/or global write (GW) operation.
? Common data inputs and data outputs.
? Clock Control, registered, address, data, and control.
? Internal Self-Timed Write cycle.
? Automatic power-down for portable applications.
? JEDEC standard 100-lead TQFP or 119 Bump BGA package.
Applications
The GS84018/32/36 is a 4,718,592 bit (4,194,304 bit for x32 version) high performance synchronous SRAM with a 2 bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPU’s, the device now finds application in synchronous SRAM applications ranging from DSP main store to networking chip set support. The GS84018/32/36 is available in a JEDEC standard 100-lead TQFP or 119 Bump BGA package.
產(chǎn)品屬性
- 型號(hào)：
GS84036T-100
- 功能描述：
x36 Fast Synchronous SRAM
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
CIRRUS |
2020+ |
TSSOP |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
GSI |
23+ |
NA |
1218 |
原裝正品代理渠道價(jià)格優(yōu)勢(shì) |
詢價(jià) | ||
GSI |
16+ |
BGA |
4000 |
進(jìn)口原裝現(xiàn)貨/價(jià)格優(yōu)勢(shì)! |
詢價(jià) | ||
GSI |
22+ |
TQFP |
2000 |
原裝正品現(xiàn)貨 |
詢價(jià) | ||
GOLDSTARSANYO |
96+ |
NA |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
GSI |
23+ |
05+ |
6500 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
GS |
DIP-64 |
68900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
GSI |
24+ |
QFP |
180 |
詢價(jià) | |||
GSI |
1999 |
29 |
原裝正品現(xiàn)貨庫(kù)存價(jià)優(yōu) |
詢價(jià) | |||
GSI |
9948+ |
QFP |
1000 |
一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) |
