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GS88032AT-225中文資料GSI數(shù)據(jù)手冊(cè)PDF規(guī)格書

GS88032AT-225
廠商型號(hào)

GS88032AT-225

功能描述

512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs

文件大小

756.7 Kbytes

頁(yè)面數(shù)量

26 頁(yè)

生產(chǎn)廠商 GSI Technology
企業(yè)簡(jiǎn)稱

GSI

中文名稱

GSI Technology官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-2-8 15:10:00

GS88032AT-225規(guī)格書詳情

Features

? FT pin for user-configurable flow through or pipeline operation

? Single Cycle Deselect (SCD) operation

? 2.5 V or 3.3 V +10/–10 core power supply

? 2.5 V or 3.3 V I/O supply

? LBO pin for Linear or Interleaved Burst mode

? Internal input resistors on mode pins allow floating mode pins

? Default to Interleaved Pipeline mode

? Byte Write (BW) and/or Global Write (GW) operation

? Internal self-timed write cycle

? Automatic power-down for portable applications

? JEDEC-standard 100-lead TQFP package

Applications

The GS88018/32/36AT is a 9,437,184-bit (8,388,608-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support.

產(chǎn)品屬性

  • 型號(hào):

    GS88032AT-225

  • 功能描述:

    512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs

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