GTLP16616MEA中文資料仙童半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

General Description

The GTLP16616 is a 17-bit registered bus transceiver that provides TTL to GTLP signal level translation. It allows for transparent, latched and clocked modes of data flow and provides a buffered GTLP (CLKOUT) clock output from the TTL CLKAB. The device provides a high speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels.

Features

■ Bidirectional interface between GTLP and TTL logic levels

■ Edge Rate Control to minimize noise on the GTLP port

■ Power up/down/off high impedance for live insertion

■ External VREF pin for receiver threshold

■ CMOS technology for low power dissipation

■ 5 V tolerant inputs and outputs on the A-Port

■ Bus-hold data inputs on the A-Port eliminates the need for external pull-up resistors on unused inputs.

■ TTL compatible driver and control inputs

■ Flow through pinout optimizes PCB layout

■ Open drain on GTLP to support wired-or connection

■ A-port source/sink ?32 mA/+32 mA

■ D-type flip-flop, latch and transparent data paths

■ GTLP Buffered CLKAB signal available (CLKOUT)

■ Recommended Operating Temperature ?40°C to 85°C