首頁 >H5PS2562GFR>規(guī)格書列表
零件編號 | 下載&訂購 | 功能描述 | 制造商&上傳企業(yè) | LOGO |
---|---|---|---|---|
H5PS2562GFR | 256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | |
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix | ||
256Mb DDR2 SDRAM KeyFeatures ?VDD,VDDQ=1.8+/-0.1V ?AllinputsandoutputsarecompatiblewithSSTL_18interface ?Fullydifferentialclockinputs(CK,/CK)operation ?Doubledatarateinterface ?Sourcesynchronous-datatransactionalignedtobidirectionaldatastrobe(DQS,DQS) ?DifferentialDataS | HynixHynix Semiconductor 海力士海力士半導體 | Hynix |
詳細參數(shù)
- 型號:
H5PS2562GFR
- 制造商:
HYNIX
- 制造商全稱:
Hynix Semiconductor
- 功能描述:
256Mb DDR2 SDRAM
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
HYNIX/海力士 |
23+ |
FBGA |
10000 |
原廠授權(quán)一級代理,專業(yè)海外優(yōu)勢訂貨,價格優(yōu)勢、品種 |
詢價 | ||
HYNIX |
208A |
BGA |
121 |
詢價 | |||
HYNIX |
2020+ |
BGA |
6000 |
百分百原裝正品 真實公司現(xiàn)貨庫存 本公司只做原裝 可 |
詢價 | ||
HYNIX |
24+ |
BGA |
5000 |
只做原裝公司現(xiàn)貨 |
詢價 | ||
HYNIX |
19+ |
256800 |
原廠代理渠道,每一顆芯片都可追溯原廠; |
詢價 | |||
HYNIX |
23+ |
NA |
568 |
專業(yè)電子元器件供應鏈正邁科技特價代理QQ1304306553 |
詢價 | ||
HYNIX |
22+23+ |
BGA |
37512 |
絕對原裝正品全新進口深圳現(xiàn)貨 |
詢價 | ||
Hynix |
23+ |
BGA84 |
20000 |
原廠原裝正品現(xiàn)貨 |
詢價 | ||
HYNIX |
ROHS+Original |
NA |
568 |
專業(yè)電子元器件供應鏈/QQ 350053121 /正納電子 |
詢價 | ||
HYNIX |
2019+ |
BGA |
6000 |
只做自己庫存,全新原裝進口正品假一賠百,可開13%增 |
詢價 |
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