首頁 >H5TC4G83AFR-PBA>規(guī)格書列表
零件編號 | 下載&訂購 | 功能描述 | 制造商&上傳企業(yè) | LOGO |
---|---|---|---|---|
H5TC4G83AFR-PBA | 4Gb DDR3L SDRAM | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | |
4GbDDR3LSDRAM | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAMLead-Free&Halogen-Free(RoHSCompliant) FEATURES ?VDD=VDDQ=1.35V+0.100/-0.067V ?Fullydifferentialclockinputs(CK,CK)operation ?DifferentialDataStrobe(DQS,DQS) ?OnchipDLLalignDQ,DQSandDQStransitionwithCK transition ?DMmaskswritedata-inatthebothrisingandfalling edgesofthedatastrobe ?Alla | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix | ||
4GbDDR3LSDRAM | HynixHynix Semiconductor 海力士海力士半導(dǎo)體 | Hynix |
詳細(xì)參數(shù)
- 型號:
H5TC4G83AFR-PBA
- 制造商:
HYNIX
- 制造商全稱:
Hynix Semiconductor
- 功能描述:
4Gb DDR3L SDRAM
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
SKHYNIX |
2016+ |
BGA |
5000 |
全新原裝現(xiàn)貨,只售原裝,假一賠十! |
詢價(jià) | ||
SK-HYNIX |
存儲器 |
BGA |
40048 |
HYNIX原裝存儲芯片-誠信為本 |
詢價(jià) | ||
SKHYNIX |
2020/原裝正品 |
BGA |
13000 |
大量現(xiàn)貨,免費(fèi)拿樣。 |
詢價(jià) | ||
SKHYNIX |
21+ |
BGA |
10000 |
全新原裝 公司現(xiàn)貨 價(jià)優(yōu) |
詢價(jià) | ||
SKHYNIX |
22+ |
BGA |
9500 |
只做原裝正品假一賠十!正規(guī)渠道訂貨! |
詢價(jià) | ||
SKHYNIX |
22+ |
BGA |
21000 |
原廠原包裝。假一罰十。可開13%增值稅發(fā)票。 |
詢價(jià) | ||
HYNIX |
24+ |
BGA |
13500 |
免費(fèi)送樣原盒原包現(xiàn)貨一手渠道聯(lián)系 |
詢價(jià) | ||
海力士 |
2015+ |
BGA78 |
347 |
全新、原裝 |
詢價(jià) | ||
HYNIX |
20+ |
BGA |
1500 |
絕對原裝現(xiàn)貨?。?!0755-83210901 |
詢價(jià) | ||
SKHYNIX |
14+ |
BGA |
6 |
詢價(jià) |
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