HC705V8GRS/D中文資料恩智浦數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? Low cost, HC05 Core

? 12K Bytes of User EPROM

? 512 Bytes of User RAM

? 128 Bytes of byte erasable EEPROM

- Byte writeable

- Byte, Block or Bulk erasable

? Message Data Link Controller (MDLC) module

? 16-channel 8-bit A/D converter (8 channels available in 56 SDIP version)

? Full function Serial Peripheral Interface (SPI)

? On-Chip Oscillator for Crystal/Ceramic Resonator

? 8-bit timer with Real Time Interrupt

? 16-bit timer with 1 input capture and 1 output compare

? 38 frequency 6-bit PWM

? COP Watchdog System

? 22 general purpose I/O pins, 16 with interrupt wake-up capability

6 I/O pins muxed with Timer and SPI pins. 16 Input Only pins muxed with

A/D.

? Mask option Low Voltage Reset (LVR).

? On-chip 5V MCU power regulator (mask option to disable)

? Power Saving STOP and WAIT Mode Instructions

(Mask Selectable STOP Instruction Disable)