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HCC4027BKT

Rad-hard, high voltage, CMOS logic series

Features ?ESCCqualified ?18VAbsolutemaximumratings ?3Vto15Voperatingvoltage ?Hermeticpackages ?Rad-hard100krad(Si)TID ?SELimmuneupto119MeV.cm2/mg ?SEUimmuneupto119MeV.cm2/mg ?-55°Cto+125°Ctemperaturerange ?ESCCspecificationavailableonESCCwebsi

STMICROELECTRONICSSTMicroelectronics

意法半導(dǎo)體意法半導(dǎo)體集團

HCF4027

DUAL-J-KMASTER-SLAVEFLIP-FLOP

DESCRIPTION TheHCC4027B(extendedtemperaturerange)andHCF4027B(intermediatetemperaturerange)aremonolithicintegratedcircuit,availablein16-leaddualin-lineplasticorceramicpackageandplasticmicropackage. ■SET-RESETCAPABILITY ■STATICFLIP-FLOPOPERATION-RETAINS

STMICROELECTRONICSSTMicroelectronics

意法半導(dǎo)體意法半導(dǎo)體集團

HCF4027B

DUAL-J-KMASTER-SLAVEFLIP-FLOP

DESCRIPTION TheHCC4027B(extendedtemperaturerange)andHCF4027B(intermediatetemperaturerange)aremonolithicintegratedcircuit,availablein16-leaddualin-lineplasticorceramicpackageandplasticmicropackage. ■SET-RESETCAPABILITY ■STATICFLIP-FLOPOPERATION-RETAINS

STMICROELECTRONICSSTMicroelectronics

意法半導(dǎo)體意法半導(dǎo)體集團

HCF4027B

DUALJ-KMASTERSLAVEFLIP-FLOP

STMICROELECTRONICSSTMicroelectronics

意法半導(dǎo)體意法半導(dǎo)體集團

HCF4027BEY

DUAL-J-KMASTER-SLAVEFLIP-FLOP

DESCRIPTION TheHCC4027B(extendedtemperaturerange)andHCF4027B(intermediatetemperaturerange)aremonolithicintegratedcircuit,availablein16-leaddualin-lineplasticorceramicpackageandplasticmicropackage. ■SET-RESETCAPABILITY ■STATICFLIP-FLOPOPERATION-RETAINS

STMICROELECTRONICSSTMicroelectronics

意法半導(dǎo)體意法半導(dǎo)體集團

HCF4027BEY

DUALJ-KMASTERSLAVEFLIP-FLOP

STMICROELECTRONICSSTMicroelectronics

意法半導(dǎo)體意法半導(dǎo)體集團

HEC4027BD

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HEC4027BDF

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HEC4027BF

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HEC4027BN

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HEC4027BP

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HEC4027BPN

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HEC4027BT

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HEC4027BTD

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HEF4027

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HEF4027B

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

HEF4027B

DualJKflip-flop

Generaldescription TheHEF4027Bisaedge-triggereddualJKflip-flopwhichfeaturesindependentset-direct(SD),clear-direct(CD),clock(CP)inputsandoutputs(Q,Q).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHasync

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

HEF4027B

DualJKflip-flopRev.9??18November2011

nxpNXP Semiconductors

恩智浦恩智浦半導(dǎo)體公司

HEF4027B

DualJKflip-flop

1.Generaldescription TheHEF4027Bisadualpositive-edgetriggeredJKflip-flopfeaturingindependentsetdirect(nSD), cleardirect(nCD),clockinputs(nCP)andcomplementaryoutputs(nQandnQ).Dataisaccepted whennCPisLOW,andtransferredtotheoutputonthepositive-goingedgeof

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

HEF4027BD

DualJKflip-flop

DESCRIPTION TheHEF4027BisadualJKflip-flopwhichisedge-triggeredandfeaturesindependentsetdirect (SD),cleardirect(CD),clock(CP)inputsandoutputs(O,O).DataisacceptedwhenCPisLOW,andtransferredtotheoutputonthepositive-goingedgeoftheclock.TheactiveHIGHas

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

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15019
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2020+
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80000
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ST/意法
21+
CDIP16
23000
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2122+
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11190
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22+
CDIP
12245
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ST/意法
22+
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11190
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824
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24+
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96000
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ST
21+
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629
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20+
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25000
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更多HCC4027BKT供應(yīng)商 更新時間2024-12-23 10:12:00