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HCF4032BM1中文資料意法半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書

HCF4032BM1
廠商型號(hào)

HCF4032BM1

功能描述

TRIPLE SERIAL ADDERS

文件大小

236.36 Kbytes

頁面數(shù)量

11

生產(chǎn)廠商 STMicroelectronics
企業(yè)簡稱

STMICROELECTRONICS意法半導(dǎo)體

中文名稱

意法半導(dǎo)體集團(tuán)官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-3-13 18:20:00

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HCF4032BM1規(guī)格書詳情

DESCRIPTION

The HCC/4032B/4038B (extended temperature range) and HCF4032B/4038B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package.

The HCC/HCF4032B and HCC/HCF4038B types consist of three serial adder circuits with common CLOCK and CARRY-RESET inputs. Each adder has two provisions for two serial DATA INPUT signals and an INVERT command signal. When the command signal is a logical ”1”, the sum is complemented. Data words enter the adder with the least significant bit first ; the sign bit trails. The output is the MOD 2 sum of the input bits plus the carry from the previous bit position. The carry is only added at the positive-going clock transition for the HCC/HCF4032B or at the negative-going clock for the HCC/HCF4038B, thus, for spike-free operation the input data transitions should occur as soon as possible after the triggering edge. The CARRY is reset to a logical ”0” at the end of each word by applying a logical ”1” signal to a CARRY-RESET input one-bit-position before the application of the first bit of the next word.

■ INVERT INPUTS ON ALL ADDERS FOR SUM COMPLEMENTING APPLICATIONS

■ FULLY STATIC OPERATION...DC TO 10MHz (typ.) @ VDD = 10V

■ BUFFERED INPUTS AND OUTPUTS

■ SINGLE-PHASE CLOCKING

■ STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS

■ QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE

■ 5V, 10V, AND 15V PARAMETRIC RATING

■ INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE

■ 100 TESTED FOR QUIESCENT CURRENT

■ MEETS ALL REQUIREMENTS OF JEDECTENTATIVE

STANDARDN°13A, ”STANDARD SPECIFICATIONS FOR DESCRIPTION OF ”B”

SERIES CMOS DEVICES”

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