HCF4060B集成電路（IC）的計數(shù)器除法器規(guī)格書PDF中文資料

HCF4060B屬于集成電路（IC）的計數(shù)器除法器。由意法半導體集團制造生產(chǎn)的HCF4060B計數(shù)器，除法器計數(shù)器和除法器 IC 是數(shù)字邏輯器件，可對輸入發(fā)生的邏輯轉換進行計數(shù)，然后使用多個并行輸出重新發(fā)送累加的計數(shù)，和/或生成單個輸出信號轉換，從而對應用某些整數(shù)數(shù)量輸入信號轉換進行響應。除了簡單的事件計數(shù)，它們還可用于各種頻率合成應用。

DESCRIPTION

The HCF4060B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4060B consists of an oscillator section and 14 ripple carry binary counter stages.

The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which reset the counter to the all 0’s state and disable oscillator. A high level on the RESET line accomplishes the reset function. All counter stages are master slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition of φ1 (and φ0). All inputs and outputs are fully buffered. Schmitt trigger action on the clock pin permits unlimited clock rise and fall time.

■ MEDIUM-SPEED OPERATION

■ COMMON RESET

■ FULLY STATIC OPERATION

■ BUFFERED INPUTS AND OUTPUTS

■ QUIESCENT CURRENT SPECIFIED UP TO 20V

■ 5V, 10V AND 15V PARAMETRIC RATINGS

■ INPUT LEAKAGE CURRENT

II = 100nA (MAX) AT VDD = 18V TA = 25°C

■ 100 TESTED FOR QUIESCENT CURRENT

■ MEETS ALL REQUIREMENTS OF JEDEC JESD13B

STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES