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HCTS75HMSR中文資料Intersil數(shù)據(jù)手冊PDF規(guī)格書
HCTS75HMSR規(guī)格書詳情
Description
The Intersil HCTS75MS is a Radiation Hardened dual 2-bit bistable transparent latch. Each of the two latches are controlled by a separate enable input (E) which are active low. E low latches the output state.
The HCTS75MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS75MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
Features
? 3 Micron Radiation Hardened SOS CMOS
? Total Dose 200K RAD (Si)
? SEP Effective LET No Upsets: >100 MEV-cm2/mg
? Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)
? Dose Rate Survivability: >1 x 1012 RAD (Si)/s
? Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
? Latch-Up Free Under Any Conditions
? Military Temperature Range: -55°C to +125°C
? Significant Power Reduction Compared to LSTTL ICs
? DC Operating Voltage Range: 4.5V to 5.5V
? LSTTL Input Compatibility
??? - VIL = 0.8V Max
??? - VIH = VCC/2 Min
? Input Current Levels Ii ≤ 5μA at VOL, VOH
產(chǎn)品屬性
- 型號:
HCTS75HMSR
- 制造商:
INTERSIL
- 制造商全稱:
Intersil Corporation
- 功能描述:
Radiation Hardened Dual 2-Bit Bistable Transparent Latch
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
Phoenix/菲尼克斯 |
23/24+ |
1050098 |
2980 |
優(yōu)勢特價 原裝正品 全產(chǎn)品線技術(shù)支持 |
詢價 | ||
HCTL |
24+ |
con |
10000 |
查現(xiàn)貨到京北通宇商城 |
詢價 | ||
Microchip/微芯 |
30000 |
原裝正品,現(xiàn)貨優(yōu)勢 |
詢價 | ||||
24+ |
N/A |
48000 |
一級代理-主營優(yōu)勢-實惠價格-不悔選擇 |
詢價 | |||
BOURNS |
24+ |
con |
441 |
優(yōu)勢庫存,原裝正品 |
詢價 |