HD64F7051中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Overview

Features

The SH7050 series is a single-chip RISC microcontroller that integrates a RISC CPU core using an original Renesas architecture with peripheral functions required for system configuration.

The CPU has a RISC-type instruction set. Most instructions can be executed in one state (one system clock cycle), which greatly improves instruction execution speed. In addition, the 32-bit internal architecture enhances data processing power. With this CPU, it has become possible to assemble low-cost, high-performance/high-functionality systems even for applications such as real-time control, which could not previously be handled by microcontrollers because of their high-speed processing requirements.

In addition, the SH7050 series includes on-chip peripheral functions necessary for synchronous configuration, such as large-capacity ROM and RAM, a direct memory access controller (DMAC), timers, a serial communication interface (SCI), A/D converter, interrupt controller (INTC), and I/O ports.

ROM and SRAM can be directly connected by means of an external memory access support function, greatly reducing system cost.

There are versions of on-chip ROM: mask ROM and F-ZTATTM (Flexible Zero Turn Around Time) with flash memory. The flash memory can be programmed with a programmer that supports SH7050 series programming, and can also be programmed and erased by software. This enables the chip to be programmed on the user side while mounted on a board.