HD74AC112中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
HD74AC112規(guī)格書(shū)詳情
Description
The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop.
When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs
may change when the clock is High and the bistable will perform according to the Truth Table as long as minimum
setup and hold times are observed. Input data is transferred to the outputs on the falling edge of the clock pulse.
Features
? Outputs Source/Sink 24 mA
? HD74ACT112 has TTL-Compatible Inputs
? Ordering Information: Ex. HD74AC112
產(chǎn)品屬性
- 型號(hào)：
HD74AC112
- 制造商：
HITACHI
- 制造商全稱(chēng)：
Hitachi Semiconductor
- 功能描述：
Dual JK Negative Edge-Triggered Flip-Flop
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
RENESAS |
23+ |
SOP-14 |
1332 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢(xún)價(jià) | ||
HITACHI |
24+ |
SOP-14 |
5000 |
全新原裝正品,現(xiàn)貨銷(xiāo)售 |
詢(xún)價(jià) | ||
HIT |
05+ |
DIP-16 |
6000 |
絕對(duì)原裝自己現(xiàn)貨 |
詢(xún)價(jià) | ||
HITACHI/日立 |
22+ |
SOP-14 |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢(xún)價(jià) | ||
RENESAS |
2020+ |
SOP-14 |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢(xún)價(jià) | ||
HITACHI |
23+ |
DIP-16 |
10000 |
原廠授權(quán)一級(jí)代理,專(zhuān)業(yè)海外優(yōu)勢(shì)訂貨,價(jià)格優(yōu)勢(shì)、品種 |
詢(xún)價(jià) | ||
HITACHI |
22+23+ |
DIP16 |
30212 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢(xún)價(jià) | ||
HIT |
23+ |
SOP5.2mm |
52378 |
##公司主營(yíng)品牌長(zhǎng)期供應(yīng)100%原裝現(xiàn)貨可含稅提供技術(shù) |
詢(xún)價(jià) | ||
HITACHI/日立 |
23+ |
SOP14 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢(xún)價(jià) | ||
HIT |
24+ |
DIP-16 |
25 |
詢(xún)價(jià) |
