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HD74CDC2510B中文資料日立數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
HD74CDC2510B規(guī)格書(shū)詳情
Description
The HD74CDC2510B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The HD74CDC2510B operates at 3.3 V VCC and is designed to drive up to five clock loads per output.
Features
? Meets “PC SDRAM registered DIMM design support document, Rev. 1.2”
? Phase-lock loop clock distribution for synchronous DRAM applications
? External feedback (FBIN) pin is used to synchronize the outputs to the clock input
? No external RC network required
? Support spread spectrum clock (SSC) synthesizers
產(chǎn)品屬性
- 型號(hào)：
HD74CDC2510B
- 制造商：
Renesas Electronics Corporation
- 功能描述：
FACT - Tape and Reel
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
RENESAS/瑞薩 |
23+ |
TSSOP24 |
3528 |
一級(jí)代理原廠VIP渠道,專(zhuān)注軍工、汽車(chē)、醫(yī)療、工業(yè)、 |
詢(xún)價(jià) | ||
RENESAS |
589220 |
16余年資質(zhì) 絕對(duì)原盒原盤(pán) 更多數(shù)量 |
詢(xún)價(jià) | ||||
HIT |
9906+ |
SSOP24 |
304 |
一級(jí)代理,專(zhuān)注軍工、汽車(chē)、醫(yī)療、工業(yè)、新能源、電力 |
詢(xún)價(jià) | ||
HAT |
1822+ |
TSSOP24 |
9852 |
只做原裝正品假一賠十為客戶(hù)做到零風(fēng)險(xiǎn)!! |
詢(xún)價(jià) | ||
HITACH |
2020+ |
SOP |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢(xún)價(jià) | ||
HIT |
22+ |
TSSOP |
2500 |
強(qiáng)調(diào)現(xiàn)貨,隨時(shí)查詢(xún)! |
詢(xún)價(jià) | ||
HITACHI/日立 |
23+ |
TSSOP24L |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢(xún)價(jià) | ||
HIT |
24+ |
TSSOP24 |
100 |
詢(xún)價(jià) | |||
HITACHI/日立 |
22+ |
TSSOP24L |
14008 |
原裝正品 |
詢(xún)價(jià) | ||
HITACHI |
2023+ |
SOP-24 |
50000 |
原裝現(xiàn)貨 |
詢(xún)價(jià) |
