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HD74HC131P中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書

HD74HC131P
廠商型號(hào)

HD74HC131P

功能描述

3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers

文件大小

114.89 Kbytes

頁(yè)面數(shù)量

9 頁(yè)

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡(jiǎn)稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-31 14:30:00

HD74HC131P規(guī)格書詳情

Description

The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A, B, C) and D type register.

Address select data store to D type registers, during the positive going transition of the clock pulse.

Output control (G1, G2) are independent of select input and CLK input, and when G1 is low or G2 = High, all outputs is high.

Features

? High Speed Operation: tpd (CLK to Y) = 20 ns typ (CL = 50 pF)

? High Output Current: Fanout of 10 LSTTL Loads

? Wide Operating Voltage: VCC = 2 V to 6 V

? Low Input Current: 1 μA max

? Low Quiescent Supply Current: ICC (static) = 4 μA max (Ta = 25°C)

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24+
SOP
30
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HIT
1922+
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7823
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23+
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52640
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2000
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30
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35200
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