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HD74HC175P中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

HD74HC175P
廠(chǎng)商型號(hào)

HD74HC175P

功能描述

Quad. D-type Flip-Flops (with Clear)

文件大小

101.15 Kbytes

頁(yè)面數(shù)量

7 頁(yè)

生產(chǎn)廠(chǎng)商 Renesas Technology Corp
企業(yè)簡(jiǎn)稱(chēng)

RENESAS瑞薩

中文名稱(chēng)

瑞薩科技有限公司官網(wǎng)

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更新時(shí)間

2025-1-14 22:58:00

HD74HC175P規(guī)格書(shū)詳情

Description

Information at the D inputs of the HD74HC175 is transferred to the Q and Qoutputs on the positive going edge of the clock pulse. Both true and compliment outputs from each flip-flop are externally available. All four flip-flops are controlled by a common clock and a common clear. Clearing isaccomplished by a negative pulse at the clear input. All four Q outputs are cleared to a logic low level and all four Qoutputs to a logic high level.

Features

? High Speed Operation: tpd(Clock to Q) = 14 ns typ (CL= 50 pF)

? High Output Current: Fanout of 10 LSTTL Loads

? Wide Operating Voltage: VCC= 2 to 6 V

? Low Input Current: 1 μA max

? Low Quiescent Supply Current: ICC(static) = 4 μA max (Ta = 25°C)

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23+
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20000
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