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HD74HC75中文資料日立數(shù)據(jù)手冊PDF規(guī)格書

HD74HC75
廠商型號

HD74HC75

功能描述

Quad. Bistable Latches

文件大小

47.64 Kbytes

頁面數(shù)量

8

生產(chǎn)廠商 Hitachi Semiconductor
企業(yè)簡稱

Hitachi日立

中文名稱

日立公司官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2024-11-8 11:26:00

HD74HC75規(guī)格書詳情

Description

This latch is ideally suited for use as temporary storage for binary information processing, input/output, and indicator units. Information present at the data (D) input is transferred to the Q output when the latch enable (LE) is high. The Q output will follow the data input as long as the enable remains high. when the enable goes low, the information that was present at the data input at the time the transition occurred is retained at thte Q output unit the enable is permitted to go high again.

Features

? High Speed Operation: tpd (D to Q) = 12.5 ns typ (CL = 50 pF)

? High Output Current: Fanout of 10 LSTTL Loads

? Wide Operating Voltage: VCC = 2 to 6 V

? Low Input Current: 1 μA max

? Low Quiescent Supply Current: ICC (static) = 2 μA max (Ta = 25°C)

產(chǎn)品屬性

  • 型號:

    HD74HC75

  • 制造商:

    Renesas Electronics Corporation

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