HD74HC85中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Description

The HD74HC85 id designed for high speed comparison of two four bit words. This circuit has eight comparison input, 4 for each word; three cascade inputs (A B, A = B); and three decision outputs (A B, A = B). The result of a comparison is indicated by a high level on one of the decision outputs. thus it may be determined whether one word is “greater than,” “l(fā)ess than,” or “equal to” the other word. by connecting the outputs of the least significant stage to the cascade inputs of the enxt stage, words of greater than four bits can be compared. In addition the least significant stage must have a high level applied to the A = B input, and a low level to the A B inputs.

Features

? High Speed Operation: tpd (Data Word Input to Output) = 20 ns typ (CL = 50 pF)

? High Output Current: Fanout of 10 LSTTL Loads

? Wide Operating Voltage: VCC = 2 to 6 V

? Low Input Current: 1 μA max

? Low Quiescent Supply Current: ICC (static) = 4 μA max (Ta = 25°C)