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HD74HCT373P中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書
HD74HCT373P規(guī)格書詳情
Description
When the latch enable input is high, the Q outputs of HD74HCT373 will follow the D inputs and the Q outputs of HD74HCT533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals present at the other inputs and the state of the storage elements.
Features
? LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
? High Speed Operation: tpd (Data to Q) = 14 ns typ (CL = 50 pF)
? High Output Current: Fanout of 15 LSTTL Loads
? Wide Operating Voltage: VCC = 4.5 to 5.5 V
? Low Input Current: 1 μA max
? Low Quiescent Supply Current: ICC (static) = 4 μA max (Ta = 25°C)
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
HD |
22+23+ |
7.2mm |
27837 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
HITACHI |
DIP20 |
68900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
HITACHI |
23+ |
SOP |
4500 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售 |
詢價(jià) | ||
24+ |
DIP |
9 |
詢價(jià) | ||||
HITACHI |
新 |
13 |
全新原裝 貨期兩周 |
詢價(jià) | |||
HD |
2020+ |
7.2mm |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
HITACHI |
98+ |
SOP-20 |
2900 |
詢價(jià) | |||
原裝 |
1922+ |
SOP20 |
9600 |
原裝公司現(xiàn)貨假一罰十特價(jià)歡迎來(lái)電咨詢 |
詢價(jià) | ||
HD |
23+ |
55821 |
##公司主營(yíng)品牌長(zhǎng)期供應(yīng)100%原裝現(xiàn)貨可含稅提供技術(shù) |
詢價(jià) | |||
HITACHI |
06+ |
SOP 20 |
398 |
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詢價(jià) |
