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HD74LS374FPEL

Octal D-type Edge-triggered Flip-Flops (with three-state outputs)

TheHD74LS374,8-bitregisterfeaturestotem-polethree-stateoutputsdesignedspecificallyfordrivinghighlycapacitiveorrelativelylow-impedanceloads.Thehigh-impedancethirdstateandincreasedhigh-logic-leveldriveprovidethisregisterwiththecapabilityofbeingconnecteddirectlyto

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LS374FPEL

Octal D-type Edge-triggered Flip-Flops (with three-state outputs)

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LS374P

OctalD-typeEdge-triggeredFlip-Flops(withthree-stateoutputs)

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LS374P

OctalD-typeEdge-triggeredFlip-Flops(withthree-stateoutputs)

TheHD74LS374,8-bitregisterfeaturestotem-polethree-stateoutputsdesignedspecificallyfordrivinghighlycapacitiveorrelativelylow-impedanceloads.Thehigh-impedancethirdstateandincreasedhigh-logic-leveldriveprovidethisregisterwiththecapabilityofbeingconnecteddirectlyto

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LS374RPEL

OctalD-typeEdge-triggeredFlip-Flops(withthree-stateoutputs)

TheHD74LS374,8-bitregisterfeaturestotem-polethree-stateoutputsdesignedspecificallyfordrivinghighlycapacitiveorrelativelylow-impedanceloads.Thehigh-impedancethirdstateandincreasedhigh-logic-leveldriveprovidethisregisterwiththecapabilityofbeingconnecteddirectlyto

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

HD74LS374RPEL

OctalD-typeEdge-triggeredFlip-Flops(withthree-stateoutputs)

RENESASRenesas Technology Corp

瑞薩瑞薩科技有限公司

SN74LS374

OCTALD-TYPETRANSPARENTLATCHESANDEDGE-TRIGGEREDFLIP-FLOPS

TI1Texas Instruments(TI)

德州儀器德州儀器 (TI)

SN74LS374

OCTALD-TYPETRANSPARENTLATCHESANDEDGE-TRIGGEREDFLIP-FLOPS

ChoiceofEightLatchesorEightD-Type Flip-FlopsinaSinglePackage 3-StateBus-DrivingOutputs FullParallelAccessforLoading BufferedControlInputs Clock-EnableInputHasHysteresisto ImproveNoiseRejection(’S373and’S374) P-N-PInputsReduceDCLoadingonData Lines(’S373and

TI1Texas Instruments(TI)

德州儀器德州儀器 (TI)

SN74LS374

OctalTransparentLatchwith3-StateOutputsOctalD-TypeFlip-Flopwith3-StateOutput

OctalTransparentLatchwith3-StateOutputs;OctalD-TypeFlip-Flopwith3-StateOutput TheSN74LS373consistsofeightlatcheswith3-stateoutputsforbusorganizedsystemapplications.Theflip-flopsappeartransparenttothedata(datachangesasynchronously)whenLatchEnable(LE)is

ONSEMION Semiconductor

安森美半導(dǎo)體安森美半導(dǎo)體公司

SN74LS374

OCTALD-TYPETRANSPARENTLATCHESANDEDGE-TRIGGEREDFLIP-FLOPS

TITexas Instruments

德州儀器美國德州儀器公司

SN74LS374

OCTALD-TYPETRANSPARENTLATCHESANDEDGE-TRIGGEREDFLIP-FLOPS

TITexas Instruments

德州儀器美國德州儀器公司

SN74LS374

OCTALD-TYPETRANSPARENTLATCHESANDEDGE-TRIGGEREDFLIP-FLOPS

TITexas Instruments

德州儀器美國德州儀器公司

SN74LS374AJ

8-BitRegisterswithThree-StateOutputs

AMDAdvanced Micro Devices

超威半導(dǎo)體美國超威半導(dǎo)體公司

SN74LS374AN

8-BitRegisterswithThree-StateOutputs

AMDAdvanced Micro Devices

超威半導(dǎo)體美國超威半導(dǎo)體公司

SN74LS374AX

8-BitRegisterswithThree-StateOutputs

AMDAdvanced Micro Devices

超威半導(dǎo)體美國超威半導(dǎo)體公司

SN74LS374DB

OCTALD-TYPETRANSPARENTLATCHESANDEDGE-TRIGGEREDFLIP-FLOPS

ChoiceofEightLatchesorEightD-Type Flip-FlopsinaSinglePackage 3-StateBus-DrivingOutputs FullParallelAccessforLoading BufferedControlInputs Clock-EnableInputHasHysteresisto ImproveNoiseRejection(’S373and’S374) P-N-PInputsReduceDCLoadingonData Lines(’S373and

TI1Texas Instruments(TI)

德州儀器德州儀器 (TI)

SN74LS374DBR

OCTALD-TYPETRANSPARENTLATCHESANDEDGE-TRIGGEREDFLIP-FLOPS

TITexas Instruments

德州儀器美國德州儀器公司

SN74LS374DBR

OCTALD-TYPETRANSPARENTLATCHESANDEDGE-TRIGGEREDFLIP-FLOPS

TITexas Instruments

德州儀器美國德州儀器公司

SN74LS374DBR

OCTALD-TYPETRANSPARENTLATCHESANDEDGE-TRIGGEREDFLIP-FLOPS

TITexas Instruments

德州儀器美國德州儀器公司

SN74LS374DBR

OCTALD-TYPETRANSPARENTLATCHESANDEDGE-TRIGGEREDFLIP-FLOPS

ChoiceofEightLatchesorEightD-Type Flip-FlopsinaSinglePackage 3-StateBus-DrivingOutputs FullParallelAccessforLoading BufferedControlInputs Clock-EnableInputHasHysteresisto ImproveNoiseRejection(’S373and’S374) P-N-PInputsReduceDCLoadingonData Lines(’S373and

TI1Texas Instruments(TI)

德州儀器德州儀器 (TI)

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更多HD74LS374FPEL供應(yīng)商 更新時(shí)間2024-11-5 10:46:00