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HD74LS75P中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

HD74LS75P
廠商型號

HD74LS75P

功能描述

Quadruple Bistable Latches

文件大小

86.38 Kbytes

頁面數(shù)量

6

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-2-8 22:36:00

HD74LS75P規(guī)格書詳情

The HD74LS75 is ideally suited for use as temporary storage for binary information between rocessing units and input / output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low, the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go high. This device features complementary Q and Qoutputs from a 4-bit latch.

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