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HD74LV125ARPEL中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書

HD74LV125ARPEL
廠商型號(hào)

HD74LV125ARPEL

功能描述

Quad. Bus Buffer Gates with 3-state Outputs

文件大小

80.57 Kbytes

頁面數(shù)量

10

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

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更新時(shí)間

2025-1-31 23:00:00

HD74LV125ARPEL規(guī)格書詳情

Description

The HD74LV125A features independent line drivers with three state outputs. Each output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the minimum value of the resistor is determined by the current souring capability of the driver. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life.

Features

? VCC = 2.0 V to 5.5 V operation

? All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)

? All outputs VO (Max.) = 5.5 V (@VCC = 0 V)

? Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

? Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)

? Output current ±8 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V)

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23+
NA/
1580
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2016+
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3000
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RENESAS
22+23+
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11956
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24+
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HIT
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RENESAS
24+
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65200
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5000
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