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HEF4017BD中文資料飛利浦數(shù)據(jù)手冊PDF規(guī)格書

HEF4017BD
廠商型號

HEF4017BD

功能描述

5-stage Johnson counter

文件大小

99.22 Kbytes

頁面數(shù)量

8

生產(chǎn)廠商 NXP Semiconductors
企業(yè)簡稱

Philips飛利浦

中文名稱

荷蘭皇家飛利浦官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-3 15:54:00

HEF4017BD規(guī)格書詳情

DESCRIPTION

The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active HIGH outputs (Oo to O9), an active LOW output from the most significant flip-flop (O5-9), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding asynchronous master reset input (MR).

The counter is advanced by either a LOW to HIGH transition at CP0 while CP1 is LOW or a HIGH to LOW transition at CP1 while CP0 is HIGH (see also function table).

When cascading counters, the O5-9 output, which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive the CP0 input of the next counter.

A HIGH on MR resets the counter to zero (Oo = O5-9 = HIGH; O1 to O9 = LOW) independent of the clock inputs (CP0, CP1).

Automatic code correction of the counter is provided by an internal circuit: following any illegal code the counter returns to a proper counting mode within 11 clock pulses.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

產(chǎn)品屬性

  • 型號:

    HEF4017BD

  • 制造商:

    PHILIPS

  • 制造商全稱:

    NXP Semiconductors

  • 功能描述:

    5-stage Johnson counter

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