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HEF4531BD中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

HEF4531BD
廠商型號(hào)

HEF4531BD

功能描述

13-input parity checker/generator

文件大小

36.04 Kbytes

頁(yè)面數(shù)量

4 頁(yè)

生產(chǎn)廠商 NXP Semiconductors
企業(yè)簡(jiǎn)稱

Philips飛利浦

中文名稱

荷蘭皇家飛利浦官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-2-16 16:42:00

HEF4531BD規(guī)格書(shū)詳情

DESCRIPTION

The HEF4531B is a parity checker/generator with 13 parity inputs (I0 to I12) and a parity output (O). When the number of parity inputs that are HIGH is even, the output is LOW. When the number of parity inputs that are HIGH is odd, the output is HIGH. For words of 12 bits or less, the output can be used to generate either odd or even parity by appropriate termination of the unused parity input(s). For words of 14 or more bits, the devices can be cascaded by connecting the output of one device to any parity input of another device. When cascading devices, it is recommended that the output of one device be connected to the I12 input of the other device since there is less delay to the output from the I12 input than from any other input (I0 to I11).

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PHILIPS
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CDIP24
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