HEF4894BTT集成電路（IC）的移位寄存器規(guī)格書PDF中文資料

1. General description

The HEF4894B is a 12-stage serial shift register. It has a storage latch associated with each stage

for strobing data from the serial input (D) to the parallel LED driver outputs (QP0 to QP11). Data is

shifted on positive-going clock (CP) transitions. The data in each shift register stage is transferred

to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at

the output whenever the output enable (OE) input signal is HIGH.

Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4894B devices.

Serial data is available at QS1 on positive-going clock edges to allow high-speed operation in

cascaded systems with a fast clock rise time. The same serial data is available at QS2 on the next

negative going clock edge. This is used for cascading HEF4894B devices when the clock has a

slow rise time.

It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually

ground). Unused inputs must be connected to VDD, VSS, or another input.

2. Features and benefits

? Wide supply voltage range from 3.0 V to 15.0 V

? CMOS low power dissipation

? High noise immunity

? Fully static operation

? 5 V, 10 V, and 15 V parametric ratings

? Standardized symmetrical output characteristics

? Complies with JEDEC standard JESD 13-B

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-B exceeds 200 V

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C