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HM4-65642B中文資料Intersil數(shù)據(jù)手冊(cè)PDF規(guī)格書
HM4-65642B規(guī)格書詳情
Description
The HM-65642 is a CMOS 8192 x 8-bit Static Random Access Memory. The pinout is the JEDEC 28 pin, 8-bit wide standard, which allows easy memory board layouts which accommodate a variety of industry standard ROM, PROM, EPROM, EEPROM and RAMs. The HM-65642 is ideally suited for use in microprocessor based systems. In particular, interfacing with the Intersil 80C86 and 80C88 microprocessors is simplified by the convenient output enable (G) input.
Features
? Full CMOS Design
? Six Transistor Memory Cell
? Low Standby Supply Current . . . . . . . . . . . . . . . .100μA
? Low Operating Supply Current. . . . . . . . . . . . . . . 20mA
? Fast Address Access Time . . . . . . . . . . . . . . . . . . 150ns
? Low Data Retention Supply Voltage. . . . . . . . . . . . 2.0V
? CMOS/TTL Compatible Inputs/Outputs
? JEDEC Approved Pinout
? Equal Cycle and Access Times
? No Clocks or Strobes Required
? Gated Inputs
? No Pull-Up or Pull-Down Resistors Required
? Easy Microprocessor Interfacing
? Dual Chip Enable Control
產(chǎn)品屬性
- 型號(hào)：
HM4-65642B
- 制造商：
INTERSIL
- 制造商全稱：
Intersil Corporation
- 功能描述：
8K x 8 Asynchronous CMOS Static RAM
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
2020+ |
CLCC20 |
80000 |
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詢價(jià) | |||
H |
23+ |
NA/ |
3288 |
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詢價(jià) | ||
N/A |
17 |
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H系列 |
23+ |
LCC |
66800 |
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HITACHI |
23+ |
DIP24 |
1110 |
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詢價(jià) | ||
HAR |
BGA |
68900 |
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詢價(jià) | |||
HAR |
CLCC |
930 |
優(yōu)勢(shì)庫(kù)存 |
詢價(jià) | |||
MHS |
24+ |
CLCC金面 |
3358 |
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詢價(jià) | ||
MHS |
QQ咨詢 |
CLCC |
1143 |
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詢價(jià) | ||
Harris |
21+ |
25000 |
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詢價(jià) |
