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HM5264165FTT-A60中文資料日立數(shù)據(jù)手冊(cè)PDF規(guī)格書

HM5264165FTT-A60
廠商型號(hào)

HM5264165FTT-A60

功能描述

64M LVTTL interface SDRAM 133 MHz/100 MHz

文件大小

870.62 Kbytes

頁(yè)面數(shù)量

67 頁(yè)

生產(chǎn)廠商 Hitachi Semiconductor
企業(yè)簡(jiǎn)稱

Hitachi日立

中文名稱

日立公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-1-17 8:20:00

HM5264165FTT-A60規(guī)格書詳情

1-Mword × 16-bit × 4-bank/2-Mword × 8-bit × 4-bank /4-Mword × 4-bit × 4-bank PC/133, PC/100 SDRAM

Description

The Hitachi HM5264165F is a 64-Mbit SDRAM organized as 1048576-word × 16-bit × 4 bank. The Hitachi HM5264805F is a 64-Mbit SDRAM organized as 2097152-word × 8-bit × 4 bank. The Hitachi HM5264405F is a 64-Mbit SDRAM organized as 4194304-word × 4-bit × 4 bank. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP II.

Features

? 3.3 V power supply

? Clock frequency: 133 MHz/100 MHz (max)

? LVTTL interface

? Single pulsed RAS

? 4 banks can operate simultaneously and independently

? Burst read/write operation and burst read/single write operation capability

? Programmable burst length: 1/2/4/8/full page

? 2 variations of burst sequence

?- Sequential (BL = 1/2/4/8/full page)

?- Interleave (BL = 1/2/4/8)

? Programmable CAS latency: 2/3

? Byte control by DQM:DQM (HM5264805F/HM5264405F) DQMU/DQML (HM5264165F)

? Refresh cycles: 4096 refresh cycles/64 ms

? 2 variations of refresh

?- Auto refresh

?- Self refresh

? Full page burst length capability

?- Sequential burst

?- Burst stop capability

產(chǎn)品屬性

  • 型號(hào):

    HM5264165FTT-A60

  • 制造商:

    HITACHI

  • 制造商全稱:

    Hitachi Semiconductor

  • 功能描述:

    64M LVTTL interface SDRAM 133 MHz/100 MHz

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
ELPIDA
24+
TSOP
500000
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ELPIDA
22+
TSOP
33944
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ELPIDA
01+
TSOP54
2500
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ELPIDA
2020+
TSOP54
80000
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ELPIDA
0621+
TSOP
3686
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ELPIDA
22+
TSOP
9800
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ELPIDA
17+
TSOP54
9988
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ELPIDA
22+
TSOP54
3200
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New
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ELPIDA
23+
TSOP54
30000
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