HM628128A中文資料日立數(shù)據(jù)手冊PDF規(guī)格書

The Hitachi HM628128A is a CMOS static RAM organized 128 kword × 8 bit. It realizes higher density, higher performance and low power consumption by employing 0.8 μm Hi-CMOS process technology.

It offers low power standby power dissipation; therefore, it is suitable for battery back-up systems. The device, packaged in a 525-mil SOP (460-mil body SOP) or a 600-mil plastic DIP, or a 8 × 20 mm TSOP with thickness of 1.2 mm, is available for high density mounting. TSOP package is suitable for cards, and reverse type TSOP is also provided.

Features

? High speed

— Fast access time: 55/70/85/100 ns (max)

? Low power

— Active: 75 mW (typ)

— Standby: 10 μW (typ)

? Single 5 V supply

? Completely static memory

No clock or timing strobe required

? Equal access and cycle times

? Common data input and output

Three state output

? Directly TTL compatible

All inputs and outputs

? Capability of battery back up operation

2 chip selection for battery back up