HMC832集成電路（IC）的時(shí)鐘發(fā)生器PLL頻率合成器規(guī)格書PDF中文資料

HMC832屬于集成電路（IC）的時(shí)鐘發(fā)生器PLL頻率合成器。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的HMC832時(shí)鐘發(fā)生器，PLL，頻率合成器時(shí)鐘發(fā)生器、PLL 和頻率合成器集成電路 (IC) 可為邏輯器件提供參考信號(hào)的穩(wěn)定定時(shí)脈沖，這些器件包括計(jì)算機(jī)、微控制器、數(shù)據(jù)通信系統(tǒng)和圖形/視頻發(fā)生器。這些集成電路可能包括緩沖器、驅(qū)動(dòng)器、分頻器、倍頻器、多路復(fù)用器、合成器、扇出分配器和預(yù)分頻器。

GENERAL DESCRIPTION

The HMC832 is a 3.3 V, high performance, wideband, fractional-N, phase-locked loop (PLL) that features an integrated voltage controlled oscillator (VCO) with a fundamental frequency of 1500 MHz to 3000 MHz, and an integrated VCO output divider (divide by 1/2/4/6/…60/62), that enables the HMC832 to generate continuous frequencies from 25 MHz to 3000 MHz. The integrated phase detector (PD) and delta-sigma (Δ-Σ) modulator, capable of operating at up to 100 MHz, permit wider loop bandwidths and faster frequency tuning with excellent spectral performance.

Industry leading phase noise and spurious performance, across all frequencies, enable the HMC832 to minimize blocker effects, and to improve receiver sensitivity and transmitter spectral purity. A low noise floor (?160 dBc/Hz) eliminates any contribution to modulator/mixer noise floor in transmitter applications.

FEATURES

RF bandwidth:

25 MHz to 3000 MHz

3.3 V supply

Maximum phase detector rate: 100 MHz

Ultralow phase noise

?110 dBc/Hz in band, typical

Fractional figure of merit (FOM): ?226 dBc/Hz

24-bit step size, resolution 3 Hz typical

Exact frequency mode with 0 Hz frequency error

Fast frequency hopping

40-lead 6 mm × 6 mm SMT package: 36 mm2

APPLICATIONS

Cellular infrastructure

Microwave radio

WiMax, WiFi

Communications test equipment

CATV equipment

DDS replacement

Military

Tunable reference source for spurious-free performance