HYB3164165T-50中文資料西門子數(shù)據(jù)手冊PDF規(guī)格書

This HYB3164(5)165 is a 64 MBit dynamic RAM organized 4 194 304 x 16 bits. The device is fabricated in SIEMENS/IBM most advanced first generation 64Mbit CMOS silicon gate process technology.

Preliminary Information

? 4 194 304 words by 16-bit organization

? 0 to 70 ?C operating temperature

? Fast access and cycle time

RAS access time:

50 ns (-50 version)

60 ns (-60 version)

Cycle time:

84 ns (-50 version)

104 ns (-60 version)

CAS access time:

13 ns ( -50 version)

15 ns ( -60 version)

? Hyper page mode (EDO) cycle time

20 ns (-50 version)

25 ns (-60 version)

? Single + 3.3 V (± 0.3V) power supply

? Low power dissipation

max. 396 active mW ( HYB 3164165T(L)-50)

max. 360 active mW ( HYB 3164165T(L)-60)

max. 504 active mW ( HYB 3165165T(L)-50)

max. 432 active mW ( HYB 3165165T(L)-60)

7.2 mW standby (TTL)

720 W standby (MOS)

14.4 mW Self Refresh (L-version only)

? Read, write, read-modify-write, CAS-before-RAS refresh (CBR),

RAS-only refresh, hidden refresh and self refresh modes

? Hyper page mode (EDO) capability

? 2 CAS / 1 WE byte control

? 8192 refresh cycles/128 ms , 13 R/ 9C addresses (HYB 3164165T(L))

? 4096 refresh cycles/ 64 ms , 12 R/ 10C addresses (HYB 3165165T(L))

? Plastic Package:

P-TSOPII-54-1 500 mil HYB 3164(5)165T(L)