HYM724000GS-50中文資料西門子數據手冊PDF規(guī)格書

4M × 72-Bit Dynamic RAM Module (ECC - Module )

The HYM 724000/10GS-60/-70 is a 32 MByte DRAM module organized as 4 194 430 words by 72-bit in a 168-pin, dual read-out, single-in-line package comprising eighteen HYB 5116400BT/BJ 4M × 4 DRAMs in 300 mil wide TSOPII or SOJ- packages mounted together with eighteen 0.2 μF ceramic decoupling capacitors on a PC board. All inputs except RAS and DQ are buffered by using four BiCMOS 8-bit buffers/line drivers.

Preliminary Information

? 4 194 304 words by 72-bit ECC - mode organization

? Fast access and cycle time

50 ns access time

90 ns cycle time (-50 version)

60 ns access time

110 ns cycle time (-60 version)

? Fast page mode capability with

35 ns cycle time (-50 version)

40 ns cycle time (-60 version)

? Single + 5 V (± 10 ) supply

? Low power dissipation

max. 9900 mW active (-50 version)

max. 8910 mW active (-60 version)

CMOS – 165 mW standby

TTL – 275 mW standby

? CAS-before-RAS refresh, RAS-only-refresh

? 18 decoupling capacitors mounted on substrate

? All inputs, outputs and clock fully TTL compatible

? 4 Byte interleave enabled, Dual Address inputs (A0/B0)

? Buffered inputs excepts RAS and DQ

? 168 pin, dual read-out, Single in-Line Memory Module

? Utilizes eighteen 4M × 4 -DRAMs in TSOPII-packages and four BiCMOS 8-bit buffers/line drivers 74ABT244

? Two versions : HYM 724000GS with TSOPII-components (4.06 mm thickness)

HYM 724010GS with SOJ-components (8.89 mm thickness)

? 4096 refresh cycles / 64 ms with 12 / 10 addressing

? Gold contact pad

? double sided module with 25.35 mm (1000 mil) height