HYM72V4010GS-50中文資料西門(mén)子數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

4M × 72-Bit Dynamic RAM Module (ECC - Module )

The HYM 72V4000/10GS-50/-60 is a 32 MByte DRAM module organized as 4 194 430 words by 72-bit in a 168-pin, dual read-out, single-in-line package comprising eighteen HYB 3116400BT/BJ 4M × 4 DRAMs in 300 mil wide TSOPII or SOJ- packages mounted together with ceramic decoupling capacitors on a PC board. All inputs except RAS and DQ are buffered by using BiCMOS buffers/line drivers.

? 168 pin 4 194 304 words by 72-bit ECC - mode organization for PC main memory applications

? Fast access and cycle time

50 ns access time

90 ns cycle time (-50 version)

60 ns access time

110 ns cycle time (-60 version)

? Fast page mode capability with

35 ns cycle time (-50 version)

40 ns cycle time (-60 version)

? Single + 3.3V (± 0.3V) supply

? Low power dissipation

max. 6480 mW active (-50 version)

max. 5832 mW active (-60 version)

CMOS – 108 mW standby

LVTTL – 180 mW standby

? CAS-before-RAS refresh, RAS-only-refresh

? Decoupling capacitors mounted on substrate

? All inputs, outputs and clock fully LVTTL & LVCMOS compatible

? 4 Byte interleave enabled, Dual Address inputs (A0/B0)

? Buffered inputs excepts RAS and DQ

? 168 pin, dual read-out, Single in-Line Memory Module

? Utilizes eighteen 4M × 4 -DRAMs and four BiCMOS 8-bit buffers/line drivers LV244A

? Two versions : HYM 72V4000GS with TSOPII-components (4 mm thickness)

HYM 72V4010GS with SOJ-components (9 mm thickness)

? 4096 refresh cycles / 64 ms with 12 / 10 addressing

? Gold contact pad

? Double sided module with 25.35 mm (1000 mil) height