I74F112N中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書
I74F112N規(guī)格書詳情
DESCRIPTION
The 74F112, Dual Negative Edge-Triggered JK-Type Flip-Flop, feature individual J, K, Clock (CPn), Set (SD) and Reset (RD) inputs, true (Qn) and complementary (Qn) outputs.
The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table, regardless of the level at the other inputs.
A High level on the clock (CPn) input enables the J and K inputs and data will be accepted. The logic levels at the J and K inputs may be allowed to change while the CPn is High and flip-flop will perform according to the Function Table as long as minimum setup and hold times are observed. Output changes are initiated by the High-to-Low transition of the CPn.
FEATURE
? Industrial temperature range available (–40°C to +85°C)
產(chǎn)品屬性
- 型號：
I74F112N
- 制造商：
NXP Semiconductors
- 功能描述：
Flip Flop JK-Type Neg-Edge 2-Element 16-Pin PDIP
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
NXP/恩智浦 |
23+ |
NA/ |
3390 |
原裝現(xiàn)貨,當(dāng)天可交貨,原型號開票 |
詢價 | ||
PHILIPS |
24+ |
35200 |
一級代理/放心采購 |
詢價 | |||
NXP大量供貨 |
SOP |
68900 |
原包原標(biāo)簽100%進口原裝常備現(xiàn)貨! |
詢價 | |||
NXP Semiconductors |
22+ |
NA |
500000 |
萬三科技,秉承原裝,購芯無憂 |
詢價 | ||
NXP USA Inc. |
23+ |
7300 |
專注配單,只做原裝進口現(xiàn)貨 |
詢價 | |||
NXP |
2022+ |
原廠原包裝 |
8600 |
全新原裝 支持表配單 中國著名電子元器件獨立分銷 |
詢價 | ||
NXP |
23+ |
S016 |
7000 |
詢價 | |||
PHILIPS |
1922+ |
SOP14-3.9MM |
12600 |
詢價 | |||
PHILIPS |
2021++ |
SOP14 |
5850 |
原裝正品價格優(yōu)勢!歡迎詢價QQ:3315564058 |
詢價 | ||
PHILIPS |
23+ |
SOP-14 |
9960 |
價格優(yōu)勢/原裝現(xiàn)貨/客戶至上/歡迎廣大客戶來電查詢 |
詢價 |
