首頁(yè)>IC41C16100A-50T>規(guī)格書詳情
IC41C16100A-50T中文資料ICSI數(shù)據(jù)手冊(cè)PDF規(guī)格書
| 廠商型號(hào) |
IC41C16100A-50T |
| 功能描述 | 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| 文件大小 |
231.7 Kbytes |
| 頁(yè)面數(shù)量 |
21 頁(yè) |
| 生產(chǎn)廠商 | Integrated Circuit Solution Inc |
| 企業(yè)簡(jiǎn)稱 |
ICSI |
| 中文名稱 | Integrated Circuit Solution Inc官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2024-11-1 13:22:00 |
IC41C16100A-50T規(guī)格書詳情
DESCRIPTION
The ICSI IC41C16100A(S) and IC41LV16100A(S) are 1,048, 576 x 16-bit high-performance CMOS Dynamic Random Access Memories. These devices offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the 16100 series ideal for use in 16-, 32-bit wide data bus systems.
FEATURES
? Extended Data-Out (EDO) Page Mode access cycle
? TTL compatible inputs and outputs; tristate I/O
? Refresh Interval: 1,024 cycles /16 ms
? Refresh Mode:
RAS-Only, CAS-before-RAS (CBR), and Hidden
? JEDEC standard pinout
? Single power supply:
5V ± 10 (IC41C16100A(S))
3.3V ± 10 (IC41LV16100A(S))
? Byte Write and Byte Read operation via two CAS
? Self Refresh 1024 cycles for S version
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|---|---|---|---|---|---|---|---|
ISSI |
21+ |
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SOJ-42 |
7300 |
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SOJ |
50000 |
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24+ |
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35 |
詢價(jià) |
