IC41C16256-50TIG中文資料ICSI數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The ICSI IC41C16256 and IC41LV16256 is a 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memo ries. The IC41C16256 offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the IC41C16256 ideal for use in 16-, 32-bit wide data bus systems.

These features make the IC41C16256and IC41LV16256 ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.

The IC41C16256 is packaged in a 40-pin 400mil SOJ and 400mil TSOP-2.

FEATURES

? Extended Data-Out (EDO) Page Mode access cycle

? TTL compatible inputs and outputs; tristate I/O

? Refresh Interval: 512 cycles /8 ms

? Refresh Mode: RAS-Only, CAS-before-RAS (CBR), Hidden

? Single power supply:

5V ± 10 (IC41C16256)

3.3V ± 10 (IC41LV16256)

? Byte Write and Byte Read operation via two CAS

? Industrail Temperature Range -40oC to 85oC

? Pb-free package is available