ICS2059-02中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Features

? Excellent jitter attenuation for telecom and video

clocks

? 2:1 Input MUX for input reference clocks

? No switching glitches on output

? VCXO-based clock generation offers very low jitter

and phase noise generation

? Output clock is phase and frequency locked to the

selected input reference clock

? Fixed input to output phase relationship

? +115 ppm minimum crystal frequency pullability

range, using recommended crystal

? Industrial temperature range

? Low power CMOS technology

? 16-pin TSSOP package

? Single 3.3 V power supply