ICS670-03中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Features

? Packaged in 16-pin SOIC

? Pb (lead) free package, RoHS compliant

? Clock inputs from 5 to 210 MHz (see page 2)

? Patented PLL with low phase noise

? Output clocks up to 210 MHz at 3.3V

? 15 selectable on-chip multipliers

? Power down mode available

? Low phase noise: -124 dBc/Hz at 10 kHz

? Output enable function tri-states outputs

? Low jitter 15 ps one sigma

? Advanced, low power, sub-micron CMOS process

? Industrial temperature rated

? Operating voltage of 3.3 V or 5 V