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ICS8430S10I-03中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

ICS8430S10I-03
廠商型號

ICS8430S10I-03

功能描述

Clock Generator for Cavium Processors

文件大小

830.35 Kbytes

頁面數(shù)量

32

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2024-11-15 15:26:00

ICS8430S10I-03規(guī)格書詳情

General Description

The 8430S10I-03 is a PLL-based clock generator specifically

designed for Cavium Networks SoC processors. This high

performance device is optimized to generate the processor core

reference clock, the DDR reference clocks, the PCI/PCI-X bus

clocks, and the clocks for both the Gigabit Ethernet MAC and PHY.

The clock generator offers low-jitter, low-skew clock outputs, and

edge rates that easily meet the input requirements for the

CN30XX/CN31XX/CN38XX/CN58XX processors. The output

frequencies are generated from a 25MHz external input source or an

external 25MHz parallel resonant crystal. The extended temperature

range of the 8430S10I-03 supports telecommunication, networking,

and storage requirements.

Features

? One selectable differential output pair for DDR 533/400/667,

LVPECL, LVDS interface levels

? Nine LVCMOS/ LVTTL outputs, 23? typical output impedance

? Selectable external crystal or differential input source

? Crystal oscillator interface designed for 25MHz, parallel resonant

crystal

? Differential input pair (PCLK, nPCLK) accepts LVPECL, LVDS,

CML, SSTL input levels

? Internal resistor bias on nPCLK pin allows the user to drive PCLK

input with external single-ended (LVCMOS/ LVTTL) input levels

? Power supply modes:

CORE / OUTPUT

3.3V / 3.3V LVDS, LVPECL, LVCMOS

3.3V / 2.5V LVCMOS

? -40°C to 85°C ambient operating temperature

? Available in lead-free (RoHS 6) package

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價(jià)格
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